In communication systems channel poses an important role. channels can convolve many different kind of distortions to our information. In perticular wireless channels multipath distortion is sevear.
and more sevear is such distortion is random.
To handle this, multipath affected channels require Equalizers at receaver end.
such equalizer uses different learning Algorithms for identifying channels continuously.
This project is VHDL implementation of LMS learning algorithm with pipelined architecture. so this implementation can work with higher data rates with less clock speed requirments and so with less power consumpiton
It uses Fixed point arithmatic blocks for filtering so suitable for coustom asic.